A circuit X is placed between a group of registers and an accumulator to regulate data movement such that at any given point in time the content of only one register will move to the accumulator. Which of the following circuits is suitable for X?
Multiplexer
Decoder
Demultiplexer
Encoder
Difficulty Level: 1
Positive Marks: 1.00
Negative Marks: 0.33
Which of the following devices can be used as an address decoder?
Demultiplexer
Multiplexer
Encoder
None
Difficulty Level: 1
Positive Marks: 1.00
Negative Marks: 0.33
Which of the following statements is/are true? (MSQ)
NOR-NOR realization is equivalent to OR-AND realization
NAND-NAND realization is equivalent to AND-OR realization.
NOR-NOR realization is equivalent to AND-OR realization
NAND-NAND realization is equivalent to OR-AND realization.
Difficulty Level: 1
Positive Marks: 1.00
Negative Marks: 0.00
Consider the following multiplexer which implements the function f(A,B)= A+B.

Which of the following input values is correct?

I0= A and I1=1
I0= A and I1=0
I0= A’ and I1=1
I0= A’ and I1=0
Difficulty Level: 1
Positive Marks: 1.00
Negative Marks: 0.33
Let A and B are the inputs of a binary subtractor. Which of the following represents the expressions Difference D = A-B and Barrow X, respectively?
D= A⊕B and X=A’B
D= A⊕B and X=AB
D= (A⊕B)’ and X=A’B
D= A⊕B, X=AB’
Difficulty Level: 1
Positive Marks: 1.00
Negative Marks: 0.33
Consider the following 4x1 Multiplexer which implements the function f(A,B,C).

The function f(A,B,C) is independent of which of the following variables

A
B
C
None
Difficulty Level: 1
Positive Marks: 2.00
Negative Marks: 0.66
The time complexity of a Ripple carry Adder which adds two n-bit numbers is ______
None
Difficulty Level: 1
Positive Marks: 2.00
Negative Marks: 0.66
A decoder of size 9 x 512is constructed by using k 3 x 8 decoders. The minimum value of k is _____
73
37
72
36
Difficulty Level: 1
Positive Marks: 2.00
Negative Marks: 0.66
Consider a k x 2^k decoder that is used to uniquely address a byte addressable 1 MB RAM, then the minimum value of k is ____
20
10
1024
log2 20
Difficulty Level: 1
Positive Marks: 2.00
Negative Marks: 0.66
Consider an Half Adder which is implemented by using a Decoder and ROM matrix. The size of the ROM matrix is ___
4 Word Lines and 2 Bit Lines
4 Word Lines and 4 Bit Lines
4 Word Lines and 1 Bit Lines
2 Word Lines and 4 Bit Lines
Difficulty Level: 1
Positive Marks: 2.00
Negative Marks: 0.66
Consider the following cascaded multiplexers.


The above circuit implements the function f(A,B,C,D). Minimum number of NAND gates required to implement the function f(A,B,C,D) is ___. (Assume that the input variables are available in only true form)

4
3
5
6
Difficulty Level: 1
Positive Marks: 2.00
Negative Marks: 0.66
Consider the following three variable functions.

f(A,B,C)= A’B + AB’C + AB

Which of the following multiplexers can implement the function f(A,B,C)? (MSQ)

One 2^2x1 MUX
One 2^3x1 MUX
One 2x1 MUX
None
Difficulty Level: 1
Positive Marks: 2.00
Negative Marks: 0.66
The Minimum expression represented by the following MUX with Enable input is___.

A’BC’ + A’B’C
A’BC’ + ABC
A’BC + A’B’C
ABC’ + ABC
Difficulty Level: 1
Positive Marks: 2.00
Negative Marks: 0.66
The minimum number of NAND gates required to implement an EX-NOR gate is__
5
4
3
None
Difficulty Level: 1
Positive Marks: 2.00
Negative Marks: 0.66
A function f(A,B,C,D)= Σ( 0,1,3,4,5,9,11,13) is implemented by the following 4 x 1 MUX.


Which of the following is true with respect to the inputs?

I0= A’, I1=1, I2= 0, I3=B’
I0= A, I1=1, I2= 0, I3=B
I0= A’, I1=1, I2= 1, I3=B’
I0= A’, I1=0, I2= 1, I3=B’
Difficulty Level: 1
Positive Marks: 2.00
Negative Marks: 0.66